学術洋書、ソフトウェア、データベースの専門店 Neutrino WebShop

戻る / Previous page

印刷 / Print

Series : Analog Circuits and Signal Processing

The gm/ID Methodology, A Sizing Tool for Low-Voltage Analog CMOS Circuits

The Semi-Empirical and Compact Model Approaches

¥ 10,363 (tax included)

Description

In "The gm/ID Methodology, a Sizing Tool for Low-Voltage Analog CMOS Circuits", we compare the semi-empirical to the compact model approach. Small numbers of parameters make the compact model attractive for the model paves the way towards analytic expressions unaffordable otherwise. The E.K.V model is a good candidate, but when it comes to short channel devices, compact models are either inaccurate or loose straightforwardness. Because sizing requires basically a reliable large signal representation of MOS transistors, we investigate the potential of the E.K.V model when its parameters are supposed to be bias dependent. The model-driven and semi-empirical methods are compared considering the Intrinsic Gain Stage and a few more complex circuits. A series of MATLAB files contained in the CD-ROM allow redoing the tests.